Dft

http://www.ida.liu.se/~TDDC33/labs/ 

список файлов:
DFT.rar

http://www.businesswire.com/portal/site/google/?ndmViewId=news_view&newsId=20090126005330&newsLang=en

список файлов:
STMicroelectronics Uses New Cadence Encounter Digital Implementation System for 40.doc
Mentor Graphics DFT Tools Adopted by STMicroelectronics for Advanced IC Testing Solutions.doc

http://www.cs.huji.ac.il/~jarom/vlsi_seminar/2005/lectures.html

список файлов:
vlsi_seminar from Jarom.rar

http://signal.hut.fi/kurssit/s88134/2005/Implementation.pdf

список файлов:
Implementation.pdf

http://www.semiconductor.net/article/CA6602542.html?PC=L&c=2008_12_dft_technical_news

список файлов:
Boundary-Scan Test - A Practical Approach - Harry Bleeker - Peter van den Eijnden - Frans de Jong - KLUWER ACADEMIC.pdf

A sequential scan cell includes an input port for functional data and an input for scan test data. The input for scan test data is an input to a master scan flip-flop coupled to a slave scan flip-flop defining a scan test circuit. Such a scan test circuit is coupled to the functional circuit of the sequential scan cell such that the path for a functional signal is not through the scan test circuit, imparting no performance penalty to the functional signal. Scan test data is scanned in and out of the sequential cell by two non-overlapping scan clocks that are active only when system functional clocks are in an off state.

список файлов:
007437634 Test scan cells.pdf

Tutorial on Design For Testability (DFT)

"An ASIC Design Philosophy for testability from Chips to Systems "

список файлов:
JTAG_paper.pdf

список файлов:
etw7B_1_1.pdf

Asynchronous Test Wrapper for Network-on-Chip Nodes:

http://www.cvdis.com/~tran/publications/tran_ets2007.pdf

список файлов:
tran_ets2007.pdf