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Microcode


Microcode-based Memory BIST MEMORY 12.03.09, 12:57 Автор Anton Gerasimov http://mslab.hanyang.ac.kr/wmdbk21/Sjpark/Memory_BIST.pdf список файлов: New Optimal State Assignment Technique for Partial Scan Designs.pdf Memory_BIST.pdf dkyoun_microBIST.pdf BIST Microcode 0 0 комментариев Method and apparatus for changing microcode to be executed in a processor STMicroelectronics 24.01.09, 15:36 Автор Anton Gerasimov список файлов: 007444630.pdf Microcode STMicroelectronics 0 0 комментариев Microcode Development and Debug Overview & Tutorial ARCH 02.01.09, 14:29 Автор Anton Gerasimov http://www.capsl.udel.edu/~fchen/projects/np/docs/manual/volumnI/IXP1200_DevWB_Debug_Tutorial.pdf список файлов: IXP1200_DevWB_Debug_Tutorial.pdf Microcode IXP1200 Intel Network Processor 0 0 комментариев Microcode-Based Memory BIST Implementing Modified March Algorithms Design Flow 02.01.09, 14:22 Автор Anton Gerasimov http://mslab.hanyang.ac.kr/wmdbk21/Sjpark/jp749.pdf список файлов: jp749.pdf BIST March Algorithm Microcode 0 0 комментариев Network Processor Configuration SW (Embedded Software) 01.01.09, 06:04 Автор Anton Gerasimov http://www.capsl.udel.edu/~fchen/projects/np/week_report/20020621.html Original plan Port embedded Linux 2.3.99 to IX12EB. Progress 1. Search the web for proper flash and kernel image. 2. Burn the flash with cygmon, and boot the chip via tftp from a Linux PC host. 3. Configure the network interface and nfs client to make the IXP1200 be able access remote file system. 4. Use GNU arm cross tool chain to compile a sample program, like "Hello world!", and run it on StrongArm. Problem left Plan for next week 1. Make webpage for this project. 2. Try to use IXA SDK 2.0 generate microcode and run it on the existing system. 3. Try to run the typical examples provide by Intel on the system and get some performace result. Network Processor Microcode ARM 0 0 комментариев		Рубрики сообщества Design Flow (67) Multicore (5) News (12) Education (9) Patents (4) Multi-cores (3) Networks-on-a-Chip (NoC) (44) Singapore (7) Reading (213) VLIW (5) TLM-Modeling (2) Google (19) Intel (20) Trainings (19) SystemC (18) Mentor Graphics (2) Network processors (2) 65 nm (5) IEEE (2) STMicroelectronics (18) Verification (18) Protocol Design and Analysis (6) CAD (13) Pattern Recognition (1) HDTV Design (6) Projects (3) Functional Programming (1) МФТИ (2) IP Blocks (3) LOGIC Design (16) Conferences (2) ARCH (67) Power-Management (28) CHINA/Китай (4) Реальные инновации (0) Fabs/ Production (13) Fundings (2) Crolles2 (1) 45 nm (4) Algorithms Analysis/ Optimization (1) IC Design People (6) FSA (Fabless Semiconductor Association) (2) Optimization (18) FPGA (7) SW (Embedded Software) (31) RF/ Analog Design (3) Project Control (1) НИИСИ РАН (5) VIRTUALIZATION (6) C++ (3) 32 nm (1) Simulation (10) Design Gotchas (7) Parallel Programming (1) Chipset Design (2) MEMORY (20) Design Practice (7) LIB Design (2) Все (827) Участники Anton Gerasimov loktikvj svtemp chernyatiev Всего 48 участников Облако тегов 45nm 65nm AMBA AMD ARM Asynchronous BIST Branch Prediction Cache Cadence clock domain Cortex DDR DFT DRAM fabless Fabless Design HDTV IBM Intel ISS Low-Power Mailbox MapReduce Mentor Microcode Network Processor NoC noc OCCN Optimization PLL PrimeTime prt RTL RTOS SNUG STA STMicroelectronics Synopsys Synthesis SystemC SystemVerilog TLM TSMC Verification Verilog Verilog PLI Virtualization VLIW Ближайшие события февраль 2021 Пн Вт Ср Чт Пт Сб Вс 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28